At the International Semiconductor Industry Group (ISIG) Executive Summit in Silicon Valley, Marvell Senior Vice President of Foundry and Advanced Packaging Dr. Hamid Azimi received the 2026 Hall of Fame award. This recognition celebrates leaders whose lifetime contributions have had a lasting impact, significantly advancing the semiconductor industry.

Over a career spanning more than 30 years, Dr. Azimi has led teams that have achieved numerous industry-leading advances in packaging. He was part of the team that developed the first flip-chip packaging with Ajinomoto Build-Up Film (ABF) substrates, a combination that enables engineers to design packaging containing far more and much smaller interconnects to improve signal integrity and power flow. Hamid and his team also enabled EMIB (Embedded Multi-Chip Interconnect Bridge) technology from scratch to high volume manufacturing. EMIB is the first 2.5 interposer-less panel level technology that enables ultra-large packages for AI data center products; he also has been a pioneer in glass substrates, a potential technology that could further enhance the capability of future generations of devices. Originally from a small village that “probably doesn’t even register on Google Maps,” Dr. Azimi holds over 40 patents. He earned a Ph.D. and M.S. in Materials Science from Lehigh University and a B.S. in Materials Engineering from Sharif University of Technology.

Performance and Packaging

Think of advanced packaging as an infrastructure for semiconductors. Packaging combines computing die, memory, I/O and other components into a single, cohesive device while also playing a critical role in power distribution, signal integrity and thermal management, among other tasks.

“The traditional way of improving performance at the transistor level is no longer sufficient by itself. Modern AI chips are also becoming too big to fit on a single die. Advanced packaging enables HBM to be placed next to the compute die, shorter interconnect distances, better power efficiency, heterogenous integration, high-speed die-to-die links and more,” he said. “In short, advanced packaging is what connects everything more efficiently.”

Hamid likes to use the car analogy to describe the importance of advanced packaging in the AI era. For decades, semiconductor packaging was kind of like the drivetrain of a reliable family sedan. The engine—the equivalent of silicon for computing systems—drove performance by scaling. Packaging just needed to connect things together reliably, cheaply and at scale. But AI systems today are no longer sedan-class cars. They are becoming more like Formula 1 cars. In Formula 1, the engine still matters enormously—just like silicon still matters—but the transmission, aerodynamics, cooling system, suspension, tire grip, and energy delivery become very critical because the car is operating at the absolute edge of physics. The role of advanced packaging today has become the transmission system of modern computing that determines whether that engine can actually perform at full capability by moving massive amounts of data, delivering enormous current, managing thermal density, synchronizing chiplets and memory, and enabling the whole system to operate as one integrated machine.

A modular redistribution layer (RDL) released by Marvell in 2025, for example, enables multi-chip designs 2.8x larger than conventional single-chip solutions.¹ The modular nature of the technology also helps lower manufacturing costs and increase yields. Gains achieved through packaging can ultimately translate into a lower total cost of ownership and higher return on investment for data center owners.

Next-generation challenges for the industry include 3.5D and 4.5D packaging, package-integrated voltage regulation and developing the ecosystem for co-packaged optics.

“It’s very multi-faceted and a culmination of many engineering disciplines and sciences. The needs change every few years, and there are new and complex problems to solve constantly,” he said. “If you are somebody who enjoys R&D and gets excited about N+2/N+3 technology and beyond, it’s a great space to be in.”

1. Marvell internal estimates, May 2025.

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