Archive for the 'Networking' Category
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February 23, 2026
The Golden Cable Initiative: Enabling the Cable Partner Ecosystem at Hyperscale Speed
By Michael Arsenault, Director of Product Marketing for AEC DSPs, Marvell
Rack connectivity is undergoing a historic transformation. Data center operators are demanding both scale-up and scale-out connectivity that can move more data across longer distances and between more systems, while delivering unprecedented levels of energy efficiency and reliability.
To help cable providers and their customers meet these challenges, Marvell has launched the Golden Cable initiative, designed to accelerate the development of active electrical cables (AECs). AECs are a rapidly growing class of high-bandwidth, enhanced copper interconnects used to link servers, switches, NICs and other assets in the same rack or across adjacent racks (about two to nine meters).
The Golden Cable initiative delivers a validated cable architecture tested across leading platforms and built on industry-leading software, reference designs, technical data, firmware and comprehensive support. Participants can combine these assets with their own technology to develop unique AECs powered by DSPs, optimized for specific customer requirements and use cases.
To further enhance performance and ensure broad compatibility, Golden Cable AECs are rigorously tested in the Marvell Cloud Interoperability Lab. Here, cables are validated across a wide range of customized configuration scenarios involving leading XPUs, CPUs, NICs, servers, switches, optical modules and other critical infrastructure components. This process enables Marvell and its partners to validate AEC firmware before cables reach end-customers, significantly accelerating customer qualification and deployment timelines. The result is greater confidence from the first plug-in.
The Golden Cable initiative is designed to rapidly scale and empower the cable partner ecosystem, enabling Marvell to meet accelerating market demand at true hyperscale speed. By operating in close alignment with key partners, Marvell is achieving many of the benefits of near‑vertical integration, while maintaining the flexibility and scalability of a partner‑driven model.
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January 20, 2026
Co-Packaged Copper Extending Its Reach Inside Scale-Up Networks
By Rohan Gandhi, Director of Product Management for Switching Products, Marvell
Power and space are two of the most critical resources in building AI infrastructure. That’s why Marvell is working with cabling partners and other industry experts to build a framework that enables data center operators to integrate co-packaged copper (CPC) interconnects into scale-up networks.
Unlike traditional printed circuit board (PCB) traces, CPCs aren’t embedded in circuit boards. Instead, CPCs consist of discrete ribbons or bundles of twinax cable that run alongside the board. By taking the connection out of the board, CPCs extend the reach of copper connections without the need for additional components such as equalizers or amplifiers as well as reduce interference, improve signal integrity, and lower the power budget of AI networks.
Being completely passive, CPCs can’t match the reach of active electrical cables (AECs) or optical transceivers. They extend farther than traditional direct attach copper (DAC) cables, making them an optimal solution for XPU-to-XPU connections within a tray or connecting XPUs in a tray to the backplane. Typical 800G CPC connections between processors within the same tray span a few hundred millimeters while XPU-to-backplane connections can reach 1.5 meters. Looking ahead,1.6T CPCs based around 200G lanes are expected within the next two years, followed by 3.2T solutions.
While the vision can be straightforward to describe, it involves painstaking engineering and cooperation across different ecosystems. Marvell has been cultivating partnerships to ensure a smooth transition to CPCs as well as create an environment where the technology can evolve and scale rapidly.
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January 12, 2026
Active Copper Cables: A New Class of Rack Interconnects for Further Optimizing AI
By Nicola Bramante, Senior Principal Engineer, Connectivity Marketing, Marvell
The exponential growth in AI workloads drives new requirements for connectivity in terms of data rate, associated bandwidth and distance, especially for scale-up applications. With direct attach copper (DAC) cables reaching their limits in terms of bandwidth and distance, a new class of cables, active copper cables (ACCs), are coming to market for short-reach links within a data center rack and between racks. Designed for connections up to 2 to 2.5 meters long, ACCs can transmit signals further than traditional passive DAC cables in the 200G/lane fabrics hyperscalers will soon deploy in their rack infrastructures.
At the same time, a 1.6T ACC consumes a relatively miniscule 2.5 watts of power and can be built around fewer and less sophisticated components than longer active electrical cables (AECs) or active optical cables (AOCs). The combination of features gives ACCs a peak mix of bandwidth, power, and cost for server-to-server or server-to-switch connections within the same rack.
Marvell announced its first ACC linear equalizers for producing ACC cables last month.
Inside the Cable
ACCs effectively integrate technology originally developed for the optical realm into copper cables. The idea is to use optical technologies to extend bandwidth, distance and performance while taking advantage of copper’s economics and reliability. Where these ACCs differ is in the components added to them and the way they leverage the technological capabilities of a switch or other device to which they are connected.
ACCs include an equalizer that boosts signals received from the opposite end of the connection. As analog devices, ACC equalizers are relatively inexpensive compared to digital alternatives, consume minimal power and add very little latency.
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December 02, 2025
5 Times More Queries per Second: What CXL Compute Accelerators Can Do for AI
By Khurram Malik, Senior Director of Marketing, Custom Cloud Solutions, Marvell
Near-memory compute technologies have always been compelling. They can offload tasks from CPUs to boost utilization and revenue opportunities for cloud providers. They can reduce data movement, one of the primary contributors to power consumption,1 while also increasing memory bandwidth for better performance.
They have also only been deployed sporadically; thermal problems, a lack of standards, cost and other issues have prevented many of these ideas giving developers that goldilocks combination of wanted features that will jumpstart commercial adoption.2
This picture is now changing with CXL compute accelerators, which leverage open standards, familiar technologies and a broad ecosystem. And, in a demonstration at OCP 2025, Samsung Electronics, software-defined composable solution provider Liqid, and Marvell showed how CXL accelerators can deliver outsized gains in performance.
The Liqid EX5410C is a demonstration of a CXL memory pooling and sharing appliance capable of scaling up to 20TB of additional memory. Five of the 4RU appliances can then be integrated into a pod for a whopping 100TB of memory and 5.1Tbps of additional memory bandwidth. The CXL fabric is managed by Liqid’s Matrix software that enables real-time and precise memory deployment based on workload requirements:
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November 06, 2025
Marvell Wins LEAP Award for 1.6T LPO Optical Chipset
By Vienna Alexander, Marketing Content Professional, Marvell
Marvell was announced as the top Connectivity winner in the 2025 LEAP Awards for its 1.6 Tbps LPO Optical Chipset. The judges' remarks noted that “the value case writes itself—less power, reduced complexity but substantial bandwidth increase.” Marvell earned the gold spot, reaffirming the industry-leading connectivity portfolio it is continually building.
The LEAP (Leadership in Engineering Achievement Program) Awards recognize best-in-class product and component designs across 11 categories with the feedback of an independent judging panel of experts. These awards are published by Design World, the trade magazine that covers design engineering topics in detail.
This chipset, combining a 200G/lane TIA (transimpedance amplifier) and laser drivers, enables 800G and 1.6T linear-drive pluggable optics (LPO) modules. LPO modules offer longer reach than passive copper, at low power and low latency, and are designed for scale-up compute-fabric applications.
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